The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2012

Filed:

Aug. 11, 2006
Applicants:

Vikas Gupta, Dallas, TX (US);

Jeremias Perez Libres, Garland, TX (US);

Joseph Edward Grigalunas, Dallas, TX (US);

Inventors:

Vikas Gupta, Dallas, TX (US);

Jeremias Perez Libres, Garland, TX (US);

Joseph Edward Grigalunas, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for assembling a semiconductor device. A chip () with solder bodies () on its contact pads is flipped onto a substrate (). After the reflow process, a gap () spaces chip and substrate apart. A polymer precursor is selected for its viscosity of known temperature dependence. The apparatus has a plate () with heating and cooling means to select and control a temperature profile from location to location across the plate. After preheating, the assembly is placed on a mesa () of the plate configured to heat only a portion of the substrate. Movable capillaries () blow cooled gas onto selected locations of the assembly. After the temperature profile is reached, a quantity of the precursor is deposited at a chip side and pulled into the gap by capillary action. The capillary flow is controlled by controlling the precursor viscosity based on the temperature profile, resulting in a substantially linear front, until the gap is filled substantially without voids.


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