The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2012
Filed:
Jan. 22, 2009
Hironori Kasahara, Tokyo, JP;
Keiji Kimura, Tokyo, JP;
Masayuki Ito, Tokyo, JP;
Tatsuya Kamei, Tokyo, JP;
Toshihiro Hattori, Tokyo, JP;
Hironori Kasahara, Tokyo, JP;
Keiji Kimura, Tokyo, JP;
Masayuki Ito, Tokyo, JP;
Tatsuya Kamei, Tokyo, JP;
Toshihiro Hattori, Tokyo, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Waseda University, Tokyo, JP;
Abstract
Each of processors has a barrier write register and a barrier read register. Each barrier write register is wired to each barrier read register by a dedicated wiring block. For example, a 1-bit barrier write register of a processor is connected, via the wiring block, to a first bit of each 8-bit barrier read register contained in the processors, and a 1-bit barrier write register of another processor is connected, via a wiring block, to a second bit of each 8-bit barrier read register contained in the processors. For example, a processor writes information to its own barrier write register, thereby notifying synchronization stand-by to the other processors and reads its own barrier read register, thereby recognizing whether the other processors are in synchronization stand-by or not. Therefore, a special dedicated instruction is not required along barrier synchronization processing, and the processing can be made at a high speed.