The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2012
Filed:
Oct. 30, 2006
Brett W. Coon, San Jose, CA (US);
Ming Y. Siu, Santa Clara, CA (US);
Weizhong Xu, Fremont, CA (US);
Stuart F. Oberman, Sunnyvale, CA (US);
John R. Nickolls, Los Altos, CA (US);
Peter C. Mills, San Jose, CA (US);
Brett W. Coon, San Jose, CA (US);
Ming Y. Siu, Santa Clara, CA (US);
Weizhong Xu, Fremont, CA (US);
Stuart F. Oberman, Sunnyvale, CA (US);
John R. Nickolls, Los Altos, CA (US);
Peter C. Mills, San Jose, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
Concurrent threads in a multithreaded processor share access to a memory, with any location in the shared memory being accessible by any thread. In one embodiment, the shared memory has multiple independently-addressable memory banks, and one location per bank can be accessed in parallel. Parallel processing engines executing the threads generate a group of parallel memory access requests. Address conflict logic determines whether the requests can be satisfied in parallel (e.g., based on bank access constraints) and serializes the requests to the extent needed to avoid conflicts. In some embodiments, data read from one address in the shared memory can be broadcast to multiple processing engines.