The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2012

Filed:

Jan. 05, 2011
Applicant:

Mamoru Sakugawa, Tokyo, JP;

Inventor:

Mamoru Sakugawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide a multi-core LSI capable of improving the stability of operation. A multi-core LSI comprises a plurality of CPUs coupled to a first shared bus, one or more modules coupled to a second shared bus, a shared bus controller coupled between the first shared bus and the second shared bus, for arbitrating an access to the module (s) by the CPUs, and a system controller that monitors whether or not a response signal to an access request signal of the CPUs is output from module to be accessed, wherein the system controller outputs a pseudo response signal to the first shared bus via the shared bus controller to terminate the access by the CPU while accessing if the response signal is not output from the module to be accessed after the access request signal is output to the second shared bus from the shared bus controller and before a predetermined time elapses.


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