The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2012

Filed:

Jun. 25, 2008
Applicants:

Luis Elvira Villagra, Maastrich, NL;

Rinze L. M. Meijer, Herkenbosch, NL;

Jose DE Jesus Pineda DE Gyvez, Eindhoven, NL;

Inventors:

Luis Elvira Villagra, Maastrich, NL;

Rinze L. M. Meijer, Herkenbosch, NL;

Jose De Jesus Pineda De Gyvez, Eindhoven, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes n-wells () and p-wells () used to make up a plurality of memory cell elements (). The n-wells () and p-5 wells () can be back-biased to improve reading and writing performance. One of the n-wells and p-wells can be globally biased while the other one of the n-wells and p-wells can be biased by groups, such as blocks, rows or columns. Error reduction and/or correction can be performed by adjusting the well bias.


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Elvira Villagra, Luis. (2012). Static memory devices (U.S. Patent No. 8107288). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8107288

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