The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2012
Filed:
Mar. 31, 2007
Amrita Deshpande, Chandler, AZ (US);
Amrita Deshpande, Chandler, AZ (US);
NXP B.V., Eindhoven, NL;
Abstract
IC clock generators are implemented using a variety of methods. Using one such method, a method is implemented using logic circuitry arranged in a state machine to control the clock signal () on the IC bus. A first state () of the state machine determines whether to effect a clock stretching delay. A second state () of the state machine determines whether the IC bus is configured to run in a standard clock mode or in another one of multiple faster clock modes. A third state () of the state machine drives the clock signal in one binary logic state for more than about 0.5 microseconds before allowing the clock signal () to be driven in the other binary logic state and allowing the clock signal to remain in the other binary logic state for more than about 0.5 microseconds.