The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2012
Filed:
Jun. 29, 2008
Hirak Mitra, Sunnyvale, CA (US);
Raj Kulkarni, Sunnyvale, CA (US);
Richard Wicks, Sunnyvale, CA (US);
Michael Moon, Sunnyvale, CA (US);
Hirak Mitra, Sunnyvale, CA (US);
Raj Kulkarni, Sunnyvale, CA (US);
Richard Wicks, Sunnyvale, CA (US);
Michael Moon, Sunnyvale, CA (US);
Navosha Corporation, Sunnyvale, CA (US);
Abstract
The present disclosure provides a methodology for reducing congestion of a processing unit, preferably by configuring a plurality of functional blocks to run in parallel or in series without the influence or input from the processing unit. In an embodiment, the present method chains a plurality of functional blocks together by software so that one functional block starts after the completion of another functional block. The configuration of the chain can be series, parallel, and any combination thereof, arranged to meet the circuit's objective. The chaining can be configured and re-configured, preferably by software input. The chaining can also be performed at design time or at run time. The chaining can also be modified, preferably at design time, but can also be modified at run time.