The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2012

Filed:

Dec. 04, 2008
Applicants:

Hiroshi Ohno, Kawasaki, JP;

Takaharu Itani, Yokohama, JP;

Eiji Morifuji, Yokohama, JP;

Norikazu Ooishi, Saitama, JP;

Toshihiko Iinuma, Yokohama, JP;

Yoshinori Honguh, Yokohama, JP;

Inventors:

Hiroshi Ohno, Kawasaki, JP;

Takaharu Itani, Yokohama, JP;

Eiji Morifuji, Yokohama, JP;

Norikazu Ooishi, Saitama, JP;

Toshihiko Iinuma, Yokohama, JP;

Yoshinori Honguh, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device subjected to an optical annealing process by radiation light whose principal wavelength is 1.5 μm or less includes a circuit pattern region formed on a semiconductor substrate, and a dummy pattern region formed separately from the circuit pattern region on the semiconductor substrate. The circuit pattern region has an integrated circuit pattern containing a gate pattern related to a circuit operation. The dummy pattern region has dummy gate patterns that have the same structure as that of a gate pattern used in the integrated circuit pattern and the dummy gate patterns are repeatedly arranged with a pitch 0.4 times or less the principal wavelength.


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