The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2012
Filed:
Dec. 30, 2008
Hae Rang Choi, Ichon-si, KR;
Yong Ju Kim, Ichon-si, KR;
Sung Woo Han, Ichon-si, KR;
Hee Woong Song, Ichon-si, KR;
Ic Su OH, Ichon-si, KR;
Hyung Soo Kim, Ichon-si, KR;
Tae Jin Hwang, Ichon-si, KR;
Ji Wang Lee, Ichon-si, KR;
Jae Min Jang, Ichon-si, KR;
Chang Kun Park, Ichon-si, KR;
Hae Rang Choi, Ichon-si, KR;
Yong Ju Kim, Ichon-si, KR;
Sung Woo Han, Ichon-si, KR;
Hee Woong Song, Ichon-si, KR;
Ic Su Oh, Ichon-si, KR;
Hyung Soo Kim, Ichon-si, KR;
Tae Jin Hwang, Ichon-si, KR;
Ji Wang Lee, Ichon-si, KR;
Jae Min Jang, Ichon-si, KR;
Chang Kun Park, Ichon-si, KR;
Hynix Semiconductor Inc., , KR;
Abstract
A domain crossing circuit of a semiconductor memory apparatus, the domain crossing circuit comprising first and second count signals generated at substantially a same clock period, and representing predetermined clock differences with reference to an internal clock signal with respect to same bit combination data, and a data processing unit configured to provide output data corresponding to input data based on the second count signal in response to the input data synchronized to an external clock signal.