The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2012

Filed:

Dec. 21, 2006
Applicants:

Jamal Benzreba, Kitchener, CA;

Harminder Banwait, Waterloo, CA;

Eric Pearson, Conestogo, CA;

Inventors:

Jamal Benzreba, Kitchener, CA;

Harminder Banwait, Waterloo, CA;

Eric Pearson, Conestogo, CA;

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 7/12 (2006.01); H04N 11/02 (2006.01); H04N 11/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit generally having a first module, a second module and a third module is disclosed. The first module may be configured to (i) generate a plurality of parsed residual blocks by parsing an 8×8 CABAC (context-based adaptive binary arithmetic coding) residual block received in an input signal and (ii) generate a plurality of metric signals resulting from the parsing of the 8×8 CABAC residual block. The second module may be configured to generate a scanning position signal based on the metric signals. The third module may be configured to generating a plurality of 4×4 CAVLC (context-based adaptive variable length coding) residual blocks in an output signal by sub-sampling the parsed residual blocks based on the scanning position signal.


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