The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2012

Filed:

Apr. 01, 2009
Applicants:

Guang Chen, San Jose, CA (US);

Charles Miller, Fremont, CA (US);

David Pritzkau, Brentwood, CA (US);

Inventors:

Guang Chen, San Jose, CA (US);

Charles Miller, Fremont, CA (US);

David Pritzkau, Brentwood, CA (US);

Assignee:

FormFactor, Inc., Livermore, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

Apparatus for terminating a test signal applied to multiple semiconductor loads under test is described—for example apparatus for interfacing a test signal between a tester and a semiconductor device under test (DUT). In some examples, a probe card assembly may include at least one probe substrate each having test probes configured to contact test features of a DUT; a wiring substrate, coupled to the at least one probe substrate, having a connector configured for coupling with a source termination of a tester; a signal path formed on and/or in the wiring substrate and the at least one probe substrate, the signal path having a trace and trace stubs fanning out from the trace, an input of the trace being coupled to the connector and outputs of the trace stubs being coupled to the test probes; and a resistive termination coupled between the trace and at least one potential.


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