The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2012
Filed:
Aug. 11, 2010
Jeffrey A. Shields, Chandler, AZ (US);
Kent D. Hewitt, Chandler, AZ (US);
Donald S. Gerber, Scottsdale, AZ (US);
Jeffrey A. Shields, Chandler, AZ (US);
Kent D. Hewitt, Chandler, AZ (US);
Donald S. Gerber, Scottsdale, AZ (US);
Microchip Technology Incorporated, Chandler, AZ (US);
Abstract
A method for programming and erasing an array of NMOS electrically erasable programmable read only memory (EEPROM) cells that minimizes bit disturbances and high voltage requirements for the memory array cells and supporting circuits. In addition, the array of N-channel memory cells may be separated into independently programmable memory segments by creating multiple, electrically isolated P-wells upon which the memory segments are fabricated. The multiple, electrically isolated P-wells may be created, for example, by p-n junction isolation or dielectric isolation.