The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2012

Filed:

Sep. 09, 2005
Applicants:

Tamotsu Sakai, Ikoma, JP;

Tomoyuki Nagai, Nara, JP;

Kazuhiro Maeda, Souraku-gun, JP;

Shuji Nishi, Nara, JP;

Masakazu Satoh, Sakurai, JP;

Inventors:

Tamotsu Sakai, Ikoma, JP;

Tomoyuki Nagai, Nara, JP;

Kazuhiro Maeda, Souraku-gun, JP;

Shuji Nishi, Nara, JP;

Masakazu Satoh, Sakurai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a serial-parallel conversion circuit of a display device. First latch circuits for sampling and latching a serial signal in accordance with sampling pulses outputted from a shift register () are provided in association with stages of the shift register (). In addition, second latch circuits for latching signals outputted from the first latch circuits are provided in association with portions of the stages of the shift register (). In this case, of all the stages of the shift register (), the number of stages associated with the second latch circuits is less than the total number of stages of the shift register by two or more.


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