The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2012

Filed:

Aug. 10, 2007
Applicants:

Manabu Gokan, Hyogo, JP;

Akihisa Nakahashi, Osaka, JP;

Takayuki Hirose, Osaka, JP;

Yoko Kasai, Osaka, JP;

Kohichi Tanda, Shiga, JP;

Inventors:

Manabu Gokan, Hyogo, JP;

Akihisa Nakahashi, Osaka, JP;

Takayuki Hirose, Osaka, JP;

Yoko Kasai, Osaka, JP;

Kohichi Tanda, Shiga, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a layered electronic circuit device capable of realizing high-density/high-function mounting, easily inspecting and repairing the respective constituent elements, and improving the electronic connection characteristic. The layered electronic circuit device includes a first circuit substrate () and a second circuit substrate () which are arranged in parallel such that their substrate surfaces are opposed to each other. The peripheral portion of the first circuit substrate () and the peripheral portion of the second circuit substrate () are connected to each other by connection members (to) having a wiring member () and a thermal hardening anisotropic conductive sheet (), thereby performing electric connection.


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