The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2011
Filed:
Jul. 17, 2008
Carl Dietz Mccrosky, Saskatoon, CA;
Andrew Milton Hughes, Saskatoon, CA;
Winston Ki-cheong Mok, Vancouver, CA;
Nicholas Wayne Rolheiser, Saskatoon, CA;
Carl Dietz McCrosky, Saskatoon, CA;
Andrew Milton Hughes, Saskatoon, CA;
Winston Ki-Cheong Mok, Vancouver, CA;
Nicholas Wayne Rolheiser, Saskatoon, CA;
PMC-Sierra US, Inc., Sunnyvale, CA (US);
Abstract
A method and an apparatus for reducing power consumption and digital logic noise in a time division multiplexed memory switch. The method is embodied in an egress selection switch (ESS) block architecture. The ESS block includes a data disable block which prevents the propagation of data, in particular ingress grains, to a given group of egress ports if the data is not selected by any of the egress ports in a given group. While the ingress data disable method partitions ports into groups and saves power by disabling the fanout tree from the root on a port group basis, the egress data disable method saves power on a port group basis by disabling the fanout tree from the tail end in addition to applying the ingress data disable method. The ESS block also includes an grain select block for selecting and storing a given ingress grain for eventual output to an egress port.