The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2011

Filed:

Jun. 16, 2006
Applicants:

Soong-yong Joo, Seongnam-si, KR;

Myung-koo Kang, Seoul, KR;

Lintao Zhang, Yongin-si, KR;

Jung-sun Lee, Gwangju-si, KR;

Suk-ki Jung, Suwon-si, KR;

Dong-yub Lee, Siheung-si, KR;

Jong-hwa Park, Seoul, KR;

Inventors:

Soong-Yong Joo, Seongnam-si, KR;

Myung-Koo Kang, Seoul, KR;

Lintao Zhang, Yongin-si, KR;

Jung-Sun Lee, Gwangju-si, KR;

Suk-Ki Jung, Suwon-si, KR;

Dong-Yub Lee, Siheung-si, KR;

Jong-Hwa Park, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

An array substrate includes a base substrate, a plurality of gate lines, a plurality of data lines and a pixel matrix. The plurality of gate lines and the plurality of data lines define pixel areas. The pixel matrix is formed on each pixel area, and includes a plurality of pixel columns and pixel rows. Each pixel column has a first pixel group and a second pixel group. The first pixel group is electrically connected to a first gate line adjacent to the pixel column. The second pixel group is electrically connected to a second gate line adjacent to the pixel column. Each pixel row is electrically connected to one data line adjacent to the pixel column.


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