The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2011

Filed:

Jul. 08, 2010
Applicants:

Kelvin Tran, Torrance, CA (US);

Matthias Bussmann, Los Angeles, CA (US);

Lloyd Linder, Agoura Hills, CA (US);

Salam Elahmadi, Dallas, TX (US);

Harry Tan, Palos Verdes, CA (US);

Inventors:

Kelvin Tran, Torrance, CA (US);

Matthias Bussmann, Los Angeles, CA (US);

Lloyd Linder, Agoura Hills, CA (US);

Salam Elahmadi, Dallas, TX (US);

Harry Tan, Palos Verdes, CA (US);

Assignee:

Menara Networks, Dallas, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/60 (2006.01); H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.


Find Patent Forward Citations

Tran, Kelvin. (2011). Summing circuit for a filter (U.S. Patent No. 8085079). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8085079

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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