The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2011
Filed:
Nov. 13, 2008
Reed P. Tidwell, Centerville, UT (US);
Reed P. Tidwell, Centerville, UT (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An embodiment of the invention relates to a clock signal generator and a related method to produce a clock signal that is a rational but non-integer submultiple of a reference clock signal by employing a dithered pulse signal and a fractional phase signal. The rational submultiple includes an integer part and a fractional part, the fractional part including a numerator and a denominator. A dithered pulse generator is configured to produce the dithered pulse signal from a count of the reference clock signal that is reset dependent on the integer part, and a fractional phase signal from a count that is incremented by the numerator and that is reset dependent on the denominator. A phase controller is configured to delay the dithered pulse with a delay proportional to the fractional phase to produce the output clock signal. The delay may be calibrated by internal logic.