Page buffer circuit for electrically rewritable non-volatile semiconductor memory device and control method

Abstract

Within a page bufferwhich is coupled to a non-volatile memory cell arrayand temporally stores data as the data with a predetermined page unit is written in and read out to/from the memory cell array, at least one latch circuit-including a bit line selector, a page buffer unit circuitincluding two latch L, L, and a latch Lis set up for a plurality of bit lines. The bit line selectorselects one bit line and couples it to the page buffer unit circuit. The latch Ltemporally stores the data which are read out from the memory cell of the selected bit line, and then outputs the data through the latch Lor L. On the other hand, the latch Ltemporally stores the programming data inputted through the latch Lor L, and after that outputs it to the memory cell of the selected bit line for programming.