The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2011
Filed:
Sep. 09, 2009
Applicant:
Dai Kanai, Kawasaki, JP;
Inventor:
Dai Kanai, Kawasaki, JP;
Assignee:
Fujitsu Semiconductor Limited, Yokohama, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of designing a semiconductor device includes density verification of layout data of the semiconductor device at a macro level. The method includes disposing virtual patterns each including a predetermined step width on a circumference of a verification frame; and moving the verification frame outside which the virtual patterns are disposed sequentially by the predetermined step width and performing the density verification of the layout data of the semiconductor device.
Kanai, Dai. (2011). Method of designing semiconductor device including density verification (U.S. Patent No. 8078994). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8078994
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile