The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2011

Filed:

Dec. 06, 2007
Applicants:

Shinichi Ouchi, Tsukuba, JP;

Yongxun Liu, Tsukuba, JP;

Meishoku Masahara, Tsukuba, JP;

Takashi Matsukawa, Tsukuba, JP;

Kazuhiko Endo, Tsukuba, JP;

Inventors:

Shinichi Ouchi, Tsukuba, JP;

Yongxun Liu, Tsukuba, JP;

Meishoku Masahara, Tsukuba, JP;

Takashi Matsukawa, Tsukuba, JP;

Kazuhiko Endo, Tsukuba, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An SRAM device including a memory cell, the memory cell having two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a field effect transistor having a standing semiconductor thin plate, a logic signal input gate and a bias voltage input gate, the gates sandwiching the semiconductor thin plate and being electrically separated from each other, a first bias voltage is applied to bias voltage input gates of the transistors of the memory cells in a row including a memory cell being accessed for reading or writing, and a second bias voltage is applied to the bias voltage input gates of the transistors of the memory cells in a row including a memory cell under memory holding operation.


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