The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2011

Filed:

Aug. 27, 2009
Applicants:

Su-jeong Kim, Seoul, KR;

Hye-ran You, Incheon, KR;

Yoon-sung Um, Yongin-si, KR;

Jae-jin Lyu, Yongin-si, KR;

Keun-chan OH, Cheonan-si, KR;

Jong-ho Son, Seoul, KR;

Inventors:

Su-Jeong Kim, Seoul, KR;

Hye-Ran You, Incheon, KR;

Yoon-Sung Um, Yongin-si, KR;

Jae-Jin Lyu, Yongin-si, KR;

Keun-Chan Oh, Cheonan-si, KR;

Jong-Ho Son, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/1368 (2006.01); H01L 21/77 (2006.01);
U.S. Cl.
CPC ...
Abstract

An array substrate includes; a thin-film transistor layer including; a gate line, a data line disposed substantially perpendicular to the gate line, and a switching element connected to the gate line and the data line, a gate insulation layer disposed on the gate line, a passivation layer disposed on the thin-film transistor layer, a shielding electrode disposed on the passivation layer, an insulation layer disposed on the shielding electrode; and a pixel electrode including a micro-slit pattern, the pixel electrode being disposed on the insulation layer and electrically connected to the switching element, wherein the shielding electrode is vertically aligned with the data line and the shielding electrode blocks an electromagnetic fringe field of the data line from effecting the pixel electrode.


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