The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2011
Filed:
Dec. 29, 2009
Chun Seok Jeong, Gyeonggi-do, KR;
Kee Teok Park, Gyeonggi-do, KR;
Chang Sik Yoo, Seoul, KR;
Jang Woo Lee, Seoul, KR;
Hong Jung Kim, Seoul, KR;
Chun Seok Jeong, Gyeonggi-do, KR;
Kee Teok Park, Gyeonggi-do, KR;
Chang Sik Yoo, Seoul, KR;
Jang Woo Lee, Seoul, KR;
Hong Jung Kim, Seoul, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Industry-University Cooperation Foundation, Hanyang University, Seoul, KR;
Abstract
A data alignment circuit of a semiconductor memory apparatus includes: a data strobe clock phase control block configured to control a phase of a data strobe clock signal in response to a strobe delay code and generate a delayed strobe clock signal; a plurality of data phase control blocks configured to control phases of input data in response to data delay codes and generate delayed data; a plurality of data alignment blocks configured to latch the delayed data in response to the delayed strobe clock signal and generate latched data and aligned data; and a delay code generation block configured to perform an operation of determining phases of the latched data and generate the strobe delay code and the data delay codes.