The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2011

Filed:

Sep. 23, 2008
Applicants:

Yuichiro Araki, Fukuoka, JP;

Takahisa Ueno, Kanagawa, JP;

Junichi Iutsuka, Nagasaki, JP;

Nozomu Takatori, Nagasaki, JP;

Yasuaki Hisamatsu, Kanagawa, JP;

Inventors:

Yuichiro Araki, Fukuoka, JP;

Takahisa Ueno, Kanagawa, JP;

Junichi Iutsuka, Nagasaki, JP;

Nozomu Takatori, Nagasaki, JP;

Yasuaki Hisamatsu, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 3/14 (2006.01); H04N 5/335 (2006.01);
U.S. Cl.
CPC ...
Abstract

A solid-state imaging includes a comparing circuit, an inverting circuit, and a masking circuit, and performs column parallel AD conversion processing of analog pixel signals outputted from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit is canceling an input offset between the pixel signal and the reference signal.


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