Non-volatile semiconductor memory device and method of reading the same

Abstract

A non-volatile semiconductor memory device capable of preventing reading failure during the occurrence of the FG-FG coupling effect is disclosed. The non-volatile semiconductor memory device includes a memory cell array, each cell of which stores at least two bits, such as LSB and MSB, using different threshold voltages. In addition, the device includes a control circuit for controlling the data-reading operation of the memory cell array. When the reading operation of the memory cells of a first word line is performed, the memory cells of a second word line adjacent to the first word line are examined to determine whether the writing operation of the MSB is performed. If the writing operation of the MSB is performed, a pre-charge voltage of the bit lines connecting to the memory cells of the first word line is reduced to a predetermined voltage for canceling out the raising of the threshold voltage caused by the coupling effect between gate electrodes.