The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2011

Filed:

Nov. 18, 2010
Applicants:

Hai LI, Eden Prairie, MN (US);

Yiran Chen, Eden Prairie, MN (US);

Hongyue Liu, Maple Grove, MN (US);

Xuguang Wang, Eden Prairie, MN (US);

Inventors:

Hai Li, Eden Prairie, MN (US);

Yiran Chen, Eden Prairie, MN (US);

Hongyue Liu, Maple Grove, MN (US);

Xuguang Wang, Eden Prairie, MN (US);

Assignee:

Seagate Technology LLC, Scotts Valley, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory array includes a plurality of magnetic tunnel junction cells arranged in a 2 by 2 array. Each magnetic tunnel junction cell is electrically coupled between a bit line and a source line and each magnetic tunnel junction cell electrically coupled to a transistor. Each magnetic tunnel junction cell is configured to switch between a high resistance state and a low resistance state by passing a write current passing though the magnetic tunnel junction cell. A first word line is electrically coupled to a gate of first set of two of the transistors and a second word line is electrically coupled to a gate of a second set of two of the transistors. The source line is a common source line for the plurality of magnetic tunnel junctions.


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