The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2011
Filed:
Dec. 28, 2007
Applicants:
Bo-kyeom Kim, Kyoungki-do, KR;
Sang-sik Yoon, Kyoungki-do, KR;
Inventors:
Bo-Kyeom Kim, Kyoungki-do, KR;
Sang-Sik Yoon, Kyoungki-do, KR;
Assignee:
Hynix Semiconductor, Inc., , KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
A semiconductor memory device includes a mode register set for establishing information on a delay time, a delay time calculator for calculating an I/O path delay time of a data clock on a basis of a unit period of a system clock, and a delay locked clock generator for reflecting in the data clock a value of subtracting an output of the delay time calculator from the information established in the mode register set.
Kim, Bo-Kyeom. (2011). Digital delay locked loop circuit using mode register set (U.S. Patent No. 8065550). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8065550
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile