The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2011
Filed:
Sep. 04, 2007
Gyu-bum Kyung, Suwon-si, KR;
Seung-hoon Choi, Suwon-si, KR;
Hong-sil Jeong, Seoul, KR;
Dong-seek Park, Yongin-si, KR;
Jae-yeol Kim, Suwon-si, KR;
Gyu-Bum Kyung, Suwon-si, KR;
Seung-Hoon Choi, Suwon-si, KR;
Hong-Sil Jeong, Seoul, KR;
Dong-Seek Park, Yongin-si, KR;
Jae-Yeol Kim, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
An apparatus and method for transmitting/receiving a signal in a communication system are provided. A signal reception apparatus of a communication system receives a signal and generates a child Low Density Parity Check (LDPC) codeword vector by decoding the received signal according to a child parity check matrix supporting a first coding rate. The child LDPC codeword vector includes an information vector including A (A≧1) information bits, and when the first coding rate is equal to a coding rate for a case where D (D≧1) parity bits are punctured among B (B≧1)+C (C≧1) parity bits included in a parent LDPC codeword vector generated by encoding the information vector according to a parent parity check matrix supporting a second coding rate, a child bipartite graph corresponding to the child parity check matrix is generated such that a parent bipartite graph corresponding to the parent parity check matrix corresponds to an edge merge scheme.