The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8060730 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 15, 2011

Filed:

May. 30, 2008
Applicants:

William C. Moyer, Dripping Springs, TX (US);

Jimmy Gumulja, Austin, TX (US);

Inventors:

William C. Moyer, Dripping Springs, TX (US);

Jimmy Gumulja, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
Abstract

A plurality of test points are located at predetermined circuit nodes in a processing system. Test code which includes a set of software-controllable interrupts is executed using a multiple input shift register (MISR) to generate a MISR signature. One or more selected software-controllable interrupt types are determined. During execution of the test code, the MISR is used to also accumulate data values from the plurality of test points during exception processing of one or more of the software-controllable interrupts within the set of software-controllable interrupts which are of the one or more selected software-controllable interrupt types to generate the MISR signature. A test control register has a plurality of fields, each for selecting or not selecting a corresponding software-controllable interrupt type.


Find Patent Forward Citations

Moyer, William. (2011). Selective misr data accumulation during exception processing (U.S. Patent No. 8060730). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8060730

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