The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2011
Filed:
Dec. 09, 2008
Stewart Sargaison, Foster City, CA (US);
Stewart Sargaison, Foster City, CA (US);
Sony Computer Entertainment Inc., Tokyo, JP;
Abstract
Processor emulation using fragment level translation is disclosed. A target system having a main target processor, a secondary target processor element and an instruction memory associated with the secondary target processor element may be emulated with a host system having one or more host processors and a host memory. Two or more target system code instructions for the secondary target processor may be grouped into one or more fragments with known starts and ends. A data structure that maps the host memory locations of the starts and ends may be maintained. Each fragment may be translated into a corresponding set of position-independent translated fragments executable by the host system. The translated fragments may be loaded into one or more of the host processors. If a memory layout for target system code corresponding to the one or more fragments has changed, the fragments may be dynamically re-linked, without re-translation, and executed.