The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2011
Filed:
Jun. 11, 2010
Sahil Khurana, Kamal, IN;
Vivek Singhal, Bangalore, IN;
Yogesh Darwhekar, Bangalore, IN;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A circuit for aligning input signals includes a clock generating circuit (CGC) responsive to first signal and second signal to generate a clock signal. A first flip flop and a second flip flop, coupled to the CGC, are responsive to first type of edge of the clock signal to output the first signal and the second signal. A finite state machine (FSM), coupled to the CGC, the first flip flop and the second flip flop, is responsive to second type of edge of the clock signal to detect early arrival of one of the first signal and the second signal with respect to each other, and to generate first control signal and second control signal. A first programmable delay element and a second programmable delay element, coupled to the FSM, delays first input signal based on the first control signal and second input signal based on the second control signal.