The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2011

Filed:

Feb. 18, 2010
Applicants:

Jong-chul Park, Suwon-si, KR;

Yun-seung Kang, Seoul, KR;

Inventors:

Jong-Chul Park, Suwon-si, KR;

Yun-Seung Kang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Example embodiments relate to methods of fabricating a semiconductor device having a metal-semiconductor compound region. A method according to example embodiments may include forming semiconductor pillars on a semiconductor substrate. The semiconductor substrate between the semiconductor pillars may be etched to form a trench region. A dielectric isolation pattern partially filling the trench region may be formed, and dielectric sidewall spacers may be formed on sidewalls of the semiconductor pillars. Metal-semiconductor compound regions may be formed on sidewalls of a portion of the trench region that is not filled by the isolation pattern.


Find Patent Forward Citations

Park, Jong-Chul. (2011). Method of fabricating semiconductor device having metal-semiconductor compound regions (U.S. Patent No. 8058168). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8058168

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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