The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2011

Filed:

Jun. 09, 2010
Applicants:

Jang-soo Kim, Gyeonggi-do, KR;

Hong-long Ning, Gyeonggi-do, KR;

Bong-kyun Kim, Incheon, KR;

Hong-sick Park, Gyeonggi-do, KR;

Shi-yul Kim, Gyeonggi-do, KR;

Chang-oh Jeong, Gyeonggi-do, KR;

Sang-gab Kim, Seoul, KR;

Jae-hyoung Youn, Seoul, KR;

Woo-geun Lee, Gyeonggi-do, KR;

Yang-ho Bae, Seoul, KR;

Pil-sang Yun, Seoul, KR;

Jong-hyun Choung, Gyeonggi-do, KR;

Sun-young Hong, Gyeonggi-do, KR;

Ki-won Kim, Gyeonggi-do, KR;

Byeong-jin Lee, Gyeonggi-do, KR;

Young-wook Lee, Gyeonggi-do, KR;

Jong-in Kim, Gyeonggi-do, KR;

Byeong-beom Kim, Gyeonggi-do, KR;

Nam-seok Suh, Gyeonggi-do, KR;

Inventors:

Jang-Soo Kim, Gyeonggi-do, KR;

Hong-Long Ning, Gyeonggi-do, KR;

Bong-Kyun Kim, Incheon, KR;

Hong-Sick Park, Gyeonggi-do, KR;

Shi-Yul Kim, Gyeonggi-do, KR;

Chang-Oh Jeong, Gyeonggi-do, KR;

Sang-Gab Kim, Seoul, KR;

Jae-Hyoung Youn, Seoul, KR;

Woo-Geun Lee, Gyeonggi-do, KR;

Yang-Ho Bae, Seoul, KR;

Pil-Sang Yun, Seoul, KR;

Jong-Hyun Choung, Gyeonggi-do, KR;

Sun-Young Hong, Gyeonggi-do, KR;

Ki-Won Kim, Gyeonggi-do, KR;

Byeong-Jin Lee, Gyeonggi-do, KR;

Young-Wook Lee, Gyeonggi-do, KR;

Jong-In Kim, Gyeonggi-do, KR;

Byeong-Beom Kim, Gyeonggi-do, KR;

Nam-Seok Suh, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.


Find Patent Forward Citations

Loading…