The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8055881 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 08, 2011

Filed:

Jun. 10, 2008
Applicants:

Douglas C. Burger, Austin, TX (US);

Stephen W. Keckler, Austin, TX (US);

Karthikevan Sankaralingam, Austin, TX (US);

Ramadass Nagarajan, Austin, TX (US);

Inventors:

Douglas C. Burger, Austin, TX (US);

Stephen W. Keckler, Austin, TX (US);

Karthikevan Sankaralingam, Austin, TX (US);

Ramadass Nagarajan, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/163 (2006.01);
U.S. Cl.
CPC ...
Abstract

A computation node according to various embodiments of the invention includes at least one input port capable of being coupled to at least one first other 5 computation node, a first store coupled to the input port(s) to store input data, a second store to receive and store instructions, an instruction wakeup unit to match the input data to the instructions, at least one execution unit to execute the instructions, using the input data to produce output data, and at least one output port capable of being coupled to at least one second other computation node. The node may also include a router to direct the output data from the output port(s) to the second other node. A system according to various embodiments of the invention includes and external instruction sequencer to fetch a group of instructions, and one or more interconnected, preselected computational nodes. An article according to an embodiment of the invention includes a medium having instructions which are capable of causing a machine to partition a program into a plurality of groups of instructions, assign one or more of the instruction groups to a plurality of interconnected preselected computation nodes, load the instruction groups on to the nodes, and execute the instruction groups as each instruction in each group receives all necessary associated operands for execution.


Find Patent Forward Citations

Burger, Douglas. (2011). Computing nodes for executing groups of instructions (U.S. Patent No. 8055881). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8055881

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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