The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
Jul. 31, 2008
Onur Aciicmez, San Jose, CA (US);
Jean-pierre Seifert, San Jose, CA (US);
Qingwei MA, Fremont, CA (US);
Xinwen Zhang, San Jose, CA (US);
Onur Aciicmez, San Jose, CA (US);
Jean-Pierre Seifert, San Jose, CA (US);
Qingwei Ma, Fremont, CA (US);
Xinwen Zhang, San Jose, CA (US);
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
A method and system is provided for securing micro-architectural instruction caches (I-caches). Securing an I-cache involves maintaining a different substantially random instruction mapping policy into an I-cache for each of multiple processes, and for each process, performing a substantially random mapping scheme for mapping a process instruction into the I-cache based on the substantially random instruction mapping policy for said process. Securing the I-cache may further involve dynamically partitioning the I-cache into multiple logical partitions, and sharing access to the I-cache by an I-cache mapping policy that provides access to each I-cache partition by only one logical processor.