The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2011

Filed:

Sep. 20, 2010
Applicants:

Yasuhiro Tanaka, Tokyo, JP;

Hironobu Isami, Chiba, JP;

Haruhisa Iida, Chiba, JP;

Hidenori Kikuchi, Chosei, JP;

Yukihide Ode, Mobara, JP;

Inventors:

Yasuhiro Tanaka, Tokyo, JP;

Hironobu Isami, Chiba, JP;

Haruhisa Iida, Chiba, JP;

Hidenori Kikuchi, Chosei, JP;

Yukihide Ode, Mobara, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

There is a need for decreasing a variation in times for writing to TFT elements for pixels in a direction along the extension of a gate line in a liquid crystal display apparatus. A display apparatus includes a display panel having multiple gate lines and multiple drain lines arranged in a matrix and a data driver for outputting a display data signal to each drain line. The data driver includes: an internal control signal generation circuit for generating an internal control signal for setting a timing to output a data signal to a drain line of each block on a block basis by dividing the plurality of drain lines into multiple blocks; and a register circuit for recording a setting for division of the block, a setting for a delay direction and a delay width of a timing to output the data signal, and a setting for rising and falling of an internal control signal.


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