The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
Oct. 22, 2010
Jayawardan Janardhanan, Bangalore, IN;
Gopalkrishna Ullal Nayak, Bangalore, IN;
Vikas Kumar Sinha, Bangalore, IN;
Sujoy Chakravarty, Bangalore, IN;
Shivaprakash Halagur, Bangalore, IN;
Somasunder Kattepura Sreenath, Bangalore, IN;
Jayawardan Janardhanan, Bangalore, IN;
Gopalkrishna Ullal Nayak, Bangalore, IN;
Vikas Kumar Sinha, Bangalore, IN;
Sujoy Chakravarty, Bangalore, IN;
Shivaprakash Halagur, Bangalore, IN;
Somasunder Kattepura Sreenath, Bangalore, IN;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A synchronous circuit for clock multiplexing and output-enable is implemented using a pair of logic gates and an output block. Select signals and enable signals with the corresponding logic sense are provided as inputs to the pair of logic gates, which generate respective logic outputs. The output block contains synchronizers clocked by respective input signals, and receives the logic outputs also as inputs. The output block provides a selected one of the input signals as an output, the provision of the selected input signal being accomplished in a synchronous fashion. Enabling and disabling of the output are also performed synchronously.