The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2011

Filed:

Sep. 09, 2008
Applicants:

Tung-chang Tsai, Hsin-Chu, TW;

Lee-hsun Chang, Hsin-Chu, TW;

Ming-chang Shih, Hsin-Chu, TW;

Jing-ru Chen, Hsin-Chu, TW;

Kuei-sheng Tseng, Hsin-Chu, TW;

Inventors:

Tung-Chang Tsai, Hsin-Chu, TW;

Lee-Hsun Chang, Hsin-Chu, TW;

Ming-Chang Shih, Hsin-Chu, TW;

Jing-Ru Chen, Hsin-Chu, TW;

Kuei-Sheng Tseng, Hsin-Chu, TW;

Assignee:

AU Optronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a method of making device of a display, an insulating layer, a semiconductor layer, an ohmic contact layer, a second conductive layer, and a photoresist pattern are consecutively formed on a first conductive structure. The photoresist pattern includes a first thickness region, and a second thickness region outside the first thickness region. The thickness of the second thickness region is smaller than that of the first thickness region. In addition, in a gate driver on array (GOA) of a display, it includes a gate driver on array structure with a pull-down transistor. The pull-down transistor has a gate electrode, a semiconductor island, a source electrode and a drain electrode. The semiconductor island extends out of the edges of the gate electrode, the source electrode, and the drain electrode.


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