The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2011

Filed:

Aug. 26, 1993
Applicants:

Patrick W. Bosshart, Dallas, TX (US);

Derek James Smith, Dallas, TX (US);

Daniel Charles Pickens, Garland, TX (US);

Douglas J. Matzke, Plano, TX (US);

Inventors:

Patrick W. Bosshart, Dallas, TX (US);

Derek James Smith, Dallas, TX (US);

Daniel Charles Pickens, Garland, TX (US);

Douglas J. Matzke, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Apparatus for storing all logic simulation signal values generated by a logic simulator during a simulation run is provided. The apparatus includes a runtime array for storing a plurality of signal values for each time instance in a predetermined time period, and a checkpoint cache for selectively storing the plurality of signal values stored in the runtime array at selected time instances. A hyper-checkpoint array is further provided to checkpoint the signal values in the checkpoint cache. In addition, the time instances and values of memory writes are also checkpointed. A user may retrieve the value of any signal values generated during the simulation run and may additionally rewind the simulator to a user-specified time in the simulation run.


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