The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2011

Filed:

Jul. 10, 2008
Applicants:

Shen-iuan Liu, Taipei, TW;

You-jen Wang, Taipei, TW;

Inventors:

Shen-Iuan Liu, Taipei, TW;

You-Jen Wang, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

An all-digital phase-locked loop (ADPLL) composed of digital circuits is provided. The ADPLL includes a phase-frequency detector (PFD), a control unit, a digital controlled oscillator (DCO), and a plurality of frequency dividers. A first frequency divider divides a frequency of a feedback signal CKby a natural number M to generate a first output signal CK/M. The PFD generates a decrement signal dn and an increment signal up, based on a phase difference and a frequency between a first reference clock signal CKand the first output signal CK/M. The DCO generates a clock signal CKbased on the digital control signals. A second frequency divider receives the digital control signals from the control unit and the CKfrom the DCO and divides the frequency of the CKby a bit number of the digital control signals to generate a feedback signal CKto the first frequency divider.


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