The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2011

Filed:

May. 29, 2009
Applicant:

Yoshitsugu Kawashima, Kanagawa, JP;

Inventor:

Yoshitsugu Kawashima, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/336 (2006.01); H01L 21/46 (2006.01); H01L 21/78 (2006.01); H01L 21/301 (2006.01);
U.S. Cl.
CPC ...
Abstract

An improved yield of chips is realized by reducing the width of dicing streets on the front surface side of a semiconductor wafer. A method for semiconductor chip, divided a semiconductor waferhaving a plurality of circuit patterns formed on one surfaceinto pieces, comprising, forming a groove in a boundary region between the circuit patterns from the other surfaceof the semiconductor waferby using a blade, forming a modified layerin the boundary region between the circuit patterns by irradiation with laser light L from the one surfaceor the other surface 19 of the semiconductor wafer, and dividing the semiconductor wafer into pieces by breaking the modified layer. The modified layeris formed between a bottom surfaceof a groove portionand the one surfaceof the semiconductor wafer, and a forming width WM of the modified layeris smaller than the width of the groove portion


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