The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2011
Filed:
Jun. 16, 2006
Robert Jeter, Holly Springs, NC (US);
Trevor Gamer, Apex, NC (US);
William Lee, Cary, NC (US);
Scott Smith, Mansfield, MA (US);
Gegory Goss, Dunstable, MA (US);
Robert Jeter, Holly Springs, NC (US);
Trevor Gamer, Apex, NC (US);
William Lee, Cary, NC (US);
Scott Smith, Mansfield, MA (US);
Gegory Goss, Dunstable, MA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
Techniques for processing each of multiple threads that share a core processor include receiving an intra-thread register address from the core processor. This address contains C bits for accessing each of 2registers for each thread. A thread ID is received from a thread scheduler external to the core processor. The Thread ID contains T bits for indicating a particular thread for up to 2threads. A particular register is accessed in a register bank that has 2registers using an inter-thread address that includes both the intra-thread register address and the thread ID. The particular register holds contents for the intra-thread register address for a thread having the thread ID. Consequently, register contents of all registers of all threads reside in the register bank. Thread switching is accomplished rapidly by simply accessing different slices in the register bank, without swapping contents between a set of registers and memory.