The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2011

Filed:

Sep. 30, 2008
Applicants:

Rayesh Kashinath Raikar, Karnataka, IN;

Vijaya Bhaskar Kommineni, Andhra Pradesh, IN;

Santosh Kumar Akula, Andhra Pradesh, IN;

Ranjith Kumar Kotikalapudi, Andhra Pradesh, IN;

Vinay Gangadhar, Karnataka, IN;

Inventors:

Rayesh Kashinath Raikar, Karnataka, IN;

Vijaya Bhaskar Kommineni, Andhra Pradesh, IN;

Santosh Kumar Akula, Andhra Pradesh, IN;

Ranjith Kumar Kotikalapudi, Andhra Pradesh, IN;

Vinay Gangadhar, Karnataka, IN;

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method of a skip based control logic for a first in first out (FIFO) buffer is disclosed. In one embodiment, a FIFO buffer system includes a storage for storing data, a write pointer for pointing to a write address of the storage for a write operation, and a read pointer for pointing to a read address of the storage for a read operation. Further, the FIFO buffer system includes a control logic for incrementing the read pointer based on a skip parameter of a skip register. The skip parameter is used to characterize a validity of the data for the read operation.


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