Storage apparatus and data integrity assurance method

Abstract

A channel control unit of a storage apparatus is provided with: a variable-length DMA (Direct Memory Access) that performs data transfer of variable-length data sent to or received from the host computer in accordance with an I/O request; a fixed-length DMA that performs data transfer of fixed-length data to and from the cache memory; and a buffer intervening between the variable-length DMA and the fixed-length DMA. In performing the data transfer of the fixed-length data to the cache memory, the fixed-length DMA divides the variable-length data into multiple sets of the fixed-length data each having a data size equivalent to a unit size of data managed in the cache memory, and adds a first integrity code to the last fixed-length data set of the fixed-length data sets generated by the division, the first integrity code being generated based on the entire variable-length data.