The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2011

Filed:

Apr. 25, 2008
Applicants:

Snigdho C. Bardalai, Plano, TX (US);

Sanjay Gera, Richardson, TX (US);

Richard L. Colter, Dallas, TX (US);

Fredrick S. Gruman, Plano, TX (US);

Michael D. White, Richardson, TX (US);

Inventors:

Snigdho C. Bardalai, Plano, TX (US);

Sanjay Gera, Richardson, TX (US);

Richard L. Colter, Dallas, TX (US);

Fredrick S. Gruman, Plano, TX (US);

Michael D. White, Richardson, TX (US);

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 14/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

In particular embodiments, setting up a circuit in a network includes establishing by control plane logic that planning pre-conditions for planning a circuit have been satisfied, and initiating the planning of the circuit. The control plane logic establishes that reservation pre-conditions for reservation of a resources for the circuit have been satisfied and initiates the reservation of the resources for the circuit. The control plane logic establishes that activation pre-conditions for activation of the circuit have been satisfied and initiates the activation of the circuit.


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