The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2011

Filed:

Mar. 18, 2009
Applicants:

Alberto Lometti, Merate, IT;

Silvano Frigerio, Cantu', IT;

Marco Lenti, Monza, IT;

Silvio Cucchi, Gaggiano, IT;

Marisa Treu, Magenta, IT;

Giulio Gladiali, Milan, IT;

Paolo Rossi, Milan, IT;

Inventors:

Alberto Lometti, Merate, IT;

Silvano Frigerio, Cantu', IT;

Marco Lenti, Monza, IT;

Silvio Cucchi, Gaggiano, IT;

Marisa Treu, Magenta, IT;

Giulio Gladiali, Milan, IT;

Paolo Rossi, Milan, IT;

Assignee:

Alcatel Lucent, Paris, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multi-service transport apparatus for integrated transport networks that may have an electrical matrix, termination function means handling signals incoming at said apparatus input, a plurality of termination function means interfacing different layers, and adaptation function means. The termination function means handling incoming signals are implemented in input/output port devices; the termination function means interfacing different layers and said adaptation function means are implemented in adapter devices. The matrix performs exclusively the switching of the incoming signals that are already terminated and adapted by said input/output port devices and by said adapter devices and it is transparent with respect to the signal format. The switch may have a time division multiplexing matrix provided with a number of matrix inputs and a number of matrix outputs; source address generators, connected to matrix outputs of the time division multiplexing matrix.


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