The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2011
Filed:
Dec. 20, 2007
Shinichi Ouchi, Tsukuba, JP;
Yongxun Liu, Tsukuba, JP;
Meishoku Masahara, Tsukuba, JP;
Takashi Matsukawa, Tsukuba, JP;
Kazuhiko Endo, Tsukuba, JP;
Shinichi Ouchi, Tsukuba, JP;
Yongxun Liu, Tsukuba, JP;
Meishoku Masahara, Tsukuba, JP;
Takashi Matsukawa, Tsukuba, JP;
Kazuhiko Endo, Tsukuba, JP;
Abstract
A static random access memory (SRAM) cell includes a first to a fourth semiconductor thin plate that are provided on a substrate and are arranged parallel to each other. On respective semiconductor thin plates, there is formed a first four-terminal double-gate field effect transistor (FET) with a first conductivity type, a second and a third four-terminal double-gate FET which are connected in series with each other and have a second conductivity type, a fourth and a fifth four-terminal double-gate FET which are connected in series with each other and have the second conductivity type, and a sixth four-terminal double-gate FET with the first conductivity type. The third and the fourth four-terminal double-gate FETs form select transistors, and the first, second, fifth and sixth four-terminal double-gate FETs form a complementary metal-oxide-semiconductor (CMOS) inverter.