The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2011
Filed:
Aug. 22, 2008
Dureseti Chidambarrao, Weston, CT (US);
Tong LI, Pine Brook, NJ (US);
Richard Q. Williams, Essex Junction, VT (US);
David W. Winston, Asheville, NC (US);
Dureseti Chidambarrao, Weston, CT (US);
Tong Li, Pine Brook, NJ (US);
Richard Q. Williams, Essex Junction, VT (US);
David W. Winston, Asheville, NC (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A layout of a semiconductor circuit is analyzed to calculate layout-dependant parameters that can include a mobility shift and a threshold voltage shift. Layout-dependant effects that affect the layout dependant parameters may include stress effects, rapid thermal anneal (RTA) effects, and lithographic effects. Intrinsic functions that do not reflect the layout-dependant effects are calculated, followed by calculation of scaling modifiers based on the layout-dependant parameters. A model output function that reflects the layout-dependant effects is obtained by multiplication of each of the intrinsic functions with a corresponding scaling parameter.