The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2011
Filed:
Oct. 17, 2006
David Vengerov, Sunnyvale, CA (US);
Savvas Gitzenis, Athens, GR;
Declan J. Murphy, San Francisco, CA (US);
David Vengerov, Sunnyvale, CA (US);
Savvas Gitzenis, Athens, GR;
Declan J. Murphy, San Francisco, CA (US);
Oracle America, Inc., Redwood City, CA (US);
Abstract
A method for scheduling a thread on a plurality of processors that includes obtaining a first state of a first processor in the plurality of processors and a second state of a second processor in the plurality of processors, wherein the thread is last executed on the first processor, and wherein the first state of the first processor includes the state of a cache of the first processor, obtaining a first estimated instruction rate to execute the thread on the first processor using an estimated instruction rate function and the first state, obtaining a first estimated global throughput for executing the thread on the first processor using the first estimated instruction rate and the second state, obtaining a second estimated global throughput for executing the thread on the second processor using the second state, comparing the first estimated global throughput with the second estimated global throughput to obtain a comparison result, and executing the thread, based on the comparison result, on one selected from a group consisting of the first processor and the second processor, wherein the thread performs an operation on one of the plurality of processors.