The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2011

Filed:

Oct. 31, 2006
Applicants:

Jeffrey M. Smith, Union City, CA (US);

Shail Dave, San Jose, CA (US);

Wei-je Huang, Fremont, CA (US);

Lincoln G. Garlick, Santa Clara, CA (US);

Paolo E. Sabella, San Francisco, CA (US);

Inventors:

Jeffrey M. Smith, Union City, CA (US);

Shail Dave, San Jose, CA (US);

Wei-Je Huang, Fremont, CA (US);

Lincoln G. Garlick, Santa Clara, CA (US);

Paolo E. Sabella, San Francisco, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01); G06T 1/00 (2006.01); G06T 15/00 (2011.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method for servicing multiple graphics processing channels are described. In one embodiment, a graphics processing apparatus includes a scheduler configured to direct servicing of a graphics processing channel by issuing an index related to the graphics processing channel. The graphics processing apparatus also includes a processing core connected to the scheduler. The processing core is configured to service the graphics processing channel by: (i) correlating the index with a memory location at which an instance block for the graphics processing channel is stored; and (ii) accessing the instance block stored at the memory location.


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